by kingliveson » Sat Sep 03, 2011 11:02 pm
Yes, I would have to agree. In the case of the above function, ecx register is right shifted 23 bits to see if it is set and ANDed with 1, for SSE4a (population count) instruction support. The snippet is pretty much generic as there aren't really many other ways of calling cpuid opcode. A slight modification for vendor checking:
- Code: Select all
#include <stdio.h>
#include <string.h>
int main ()
{
char VendorID[13];
int CPUInfo[4] = {-1};
int InfoType = 0x00000000;
int* eax = CPUInfo + 0;
int* ebx = CPUInfo + 1;
int* ecx = CPUInfo + 2;
int* edx = CPUInfo + 3;
*eax = InfoType;
*ecx = 0;
{__asm__("cpuid" : "=a" (*eax), "=b" (*ebx), "=c" (*ecx), "=d" (*edx)
: "0" (*eax) , "1" (*ebx) , "2" (*ecx) , "3" (*edx));
}
strncpy(VendorID, (char*) ebx, 4);
strncat(VendorID, (char*) edx, 4);
strncat(VendorID, (char*) ecx, 4);
printf("Vendor ID: %s\n", VendorID);
return 0;
}
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